1. Field of the Invention
This invention relates to a method for manufacturing a semiconductor device, and in particular, to a method of forming an MIS (Metal Insulator Semiconductor) type FET (Field Effect Transistor) device wherein a nickel silicide film is formed on a portion of the surface of a contact region of source/drain diffusion layer, and to a method of manufacturing an LSI device comprising the FET device.
2. Description of the Related Art
Concomitant with the advancement in miniaturization of semiconductor devices in recent years, there are persistent demands for the miniaturization of not only the dimension of planes parallel with the surface of semiconductor substrate such as the planar dimension of gate of transistor, the width of element isolating insulating film or the width of wirings, but also the dimension in the direction perpendicular to the surface of semiconductor substrate such as the height of a gate electrode or the depth of junction of source/drain contact region. On the other hand, it is also demanded to minimize the parasitic resistance in regions such as the gate electrode and source/drain diffusion layer, which can be realized by the formation of a silicide film having a low electric resistance on the surfaces of these regions. Therefore, it is also required to adopt a so-called SALICIDE (Self-Aligned silicide) process which is designed to form a low electric resistance silicide film on the surface of the gate electrode as well as on the surface of source/drain diffusion layer.
As for the silicide film to be formed on the surfaces of the gate electrode and source/drain diffusion layer, there have been employed a titanium silicide (TiSi2) film or a cobalt silicide (CoSi2) film. However, due to the advancement in miniaturization of semiconductor devices these days, it is now considered more difficult to meet all of the aforementioned demands, so that it is now required to employ a nickel silicide (NiSi) film in place of the aforementioned materials.
The SALICIDE process where NiSi is employed is advantageous in the following respects as compared with the SALICIDE process where TiSi2 or CoSi2 is employed. Namely, the SALICIDE process using NiSi is featured in that: (1) Any increase in sheet resistance can be hardly generated on the occasion of forming the film thereof on the surface of a fine element pattern; (2) It is possible to minimize the permeation of the silicide film into the source/drain diffusion layer; and (3) Since the silicide film can be formed at low temperatures, the inactivation of impurities in the impurity diffusion layer (source/drain diffusion layer or gate polysilicon electrode) of transistor can hardly take place (i.e. it is possible to maintain a high-activation rate).
The conventional method of manufacturing a MOS type FET device where the aforementioned nickel SALICIDE process is employed has been conducted by the process as illustrated by FIGS. 1A to 1F.
First of all, as shown in FIG. 1A, an element isolating insulating film 102 consisting of a silicon oxide film is deposited on the surface of a semiconductor substrate 101. Then, a gate electrode 104 made of polysilicon is formed, via a gate insulating film 103, on the surface of the semiconductor substrate 101, after which an impurity is implanted into the semiconductor substrate 101 to form a first diffusion region 105 on the surface of the semiconductor substrate 101.
Then, as shown in FIG. 1B, a sidewall insulating film 106 is formed on the periphery of the gate electrode 104. Further, by implantation of an impurity, a second diffusion region 107 is formed on the semiconductor substrate 101 and at the same time, the gate electrode 104 is also impregnated with the impurity.
Thereafter, as shown in FIG. 1C, a nickel film 108 is deposited all over the surface of the semiconductor substrate 101.
Then, the resultant body is subjected to a heat treatment for a period not more than 5 minutes at a temperature ranging from 450° C. to 550° C. As a result, the portion of the nickel film 108 which is contacted with the surface of the gate electrode 104 and with the surface of the second diffusion region 107 is converted into a nickel silicide (NiSi) film 109 as shown in FIG. 1D. On the other hand, the portion of the nickel film 108 which deposited on the element isolating insulating film 102 and on the sidewall insulating film 106 is prevented from taking part in the reaction thereof with silicon thereby being permitted to remain as it is.
The unreacted portion of nickel film 108 is then treated with a mixed chemical liquid containing sulfuric acid and an aqueous hydrogen peroxide solution or with a mixed chemical liquid containing an aqueous alkali solution and an aqueous hydrogen peroxide solution, thereby selectively removing the unreacted portion of nickel film 108 as shown in FIG. 1E.
Further, an interlayer insulating film 110 is deposited all over the surface of semiconductor substrate 101, and then, subjected to anisotropic etching by photolithography and RIE (Reactive Ion Etching) to form a contact hole. Finally, as shown in FIG. 1F, by this contact hole, the source, drain and gate electrode of transistor are electrically connected with a wiring layer 111 to accomplish the manufacture of FET device.
The nickel silicide (NiSi) film can be formed on the surface of the source/drain diffusion layer as well as on the surface of gate polysilicon electrode of the MOS type FET device by the nickel salicide process as mentioned above. However, the Ni film deposited on the insulating film would be easily flocculated as it is heat-treated at a temperature of 400° C. or more. Therefore, as indicated by the arrow shown in FIG. 1D, part of the Ni film is permitted to flow into the peripheral portions of the source/drain diffusion layer or of the gate electrode, thereby causing the nickel silicide (NiSi) film to be formed thicker than required. As a result, problems are raised such that the leak current at the junction (junction leak current) in the source/drain diffusion layer is caused to increase or the characteristics of the gate insulating film is caused to deteriorate.
As a result of investigation of the behavior of the flocculation of a nickel thin film (film thickness: 12 nm or less) which was deposited on a surface of silicon oxide film, it was confirmed, through the examination of sheet resistance and SEM observation, that the Ni film was caused to flocculate if the nickel thin film was subjected to heat treatment (RTA treatment) at a temperature of 400° C. or more.
In an attempt to avoid such problems, there has been proposed a method of forming a silicide film by a two-stage heat treatment. Followings are the explanation of this method which will be set forth with reference to FIGS. 2A to 2G.
First of all, according to the procedures illustrated with reference to FIG. 1A, a polysilicon gate electrode 104 is deposited, via the interposition of gate insulating film 103, on the surface of a semiconductor substrate 101 having an element isolating insulating film 102 as shown in FIG. 2A. Then, impurities are introduced into the semiconductor substrate 101 to form a first diffusion region 105. Then, as shown in FIG. 2B, a sidewall insulating film 106 is formed and impurities are introduced into the semiconductor substrate 101 to form a second diffusion region 107. Further, as shown in FIG. 2C, a nickel film 108 is deposited all over the surface of the semiconductor substrate 101.
The semiconductor substrate 101 having the nickel film 108 formed all over the surface thereof is then subjected to heat treatment for 5 minutes or less at a temperature ranging from 250° C. to 400° C. Due to this heat treatment, the nickel film 108 which is contacted with the gate electrode 104 and with the second diffusion region 107 is converted into a nickel-rich nickel silicide film 112 consisting of di-nickel silicide (Ni2Si) or of a mixture of di-nickel silicide (Ni2Si) and nickel monosilicide (NiSi) as shown in FIG. 2D. Since the temperature of this heat treatment is not higher than 400° C., the nickel film 108 that has been deposited on the surface of an insulating film such as the element isolating insulating film 102 and the sidewall insulating film 106 is permitted to remain as an unreacted nickel without being flocculated.
The unreacted portion of nickel film 108 is then treated by using sulfated water or alkalized water to selectively remove it as shown in FIG. 2E.
The resultant semiconductor substrate is further subjected to a heat treatment for a period of five minutes or less at a temperature ranging from 450° C. to 550° C., thereby enabling the nickel-rich nickel silicide film 112 to convert into a nickel monosilicide (NiSi) film 109 as shown in FIG. 2F.
Thereafter, an interlayer insulating film 110 is deposited all over the surface of the semiconductor substrate 101 and then subjected to anisotropic etching such as photolithography and RIE (Reactive Ion Etching) so as to form a contact hole. Finally, as shown in FIG. 2G, by this contact hole, the source, drain and gate electrode of transistor are electrically connected with a wiring layer 111 to accomplish the manufacture of a MOS type FET device.
Due to this two-stage heat treatment, it is possible to form a nickel silicide film which is low in electric resistance and capable of suppressing the generation of not only the junction leak but also the failure of gate insulating film. However, this two-stage heat treatment is accompanied with a problem that when the source/drain diffusion layer or the gate polysilicon electrode contains a high concentration of arsenic impurity, inconveniences are caused to generate in the manufacture of a MOSFET device, thereby making it difficult to manufacture a semiconductor device excellent in reliability.